A gate driver’s undervoltage lockout prevents ordinary operation below a defined supply level, but the system must also handle the moment that supply returns. If the input command is already active, recovery may produce an output transition at a time the controller did not expect. Review the full sequence rather than only the shutdown threshold.

Map each supply domain

Identify logic supply, high side or isolated output supply, low side supply, and their references. The TI UCC21520 data sheet describes separate supply monitoring behavior and the output response under undervoltage conditions. Read the applicable part’s thresholds, hysteresis, and functional state definitions.

Do not assume that all channels become available together. Independent supplies and thresholds can leave one side of a bridge ready while another remains locked out.

Define command ownership during recovery

Record PWM input, enable or disable, reset, and ready indication states before supply startup. Determine whether the controller actively holds an inactive command or leaves an input dependent on its default bias. Include processor reset and firmware initialization. Check the supply domain used by any ready or fault pullup.

Check the documented output response when supply crosses the release threshold while the input is high. If the system requires a deliberate restart, implement and verify that requirement using the supported control interface. Do not rely on an assumed missed pulse to prevent switching.

Test slow and interrupted supplies

Capture driver supply at its pins, command input, output gate voltage, and any ready signal during slow ramps, dips, and recovery. Use bounded tests within the device’s operating guidance. Include the actual decoupling and bias supply so the observed sequence represents the assembly.

Inspect for repeated crossings caused by supply droop under gate charging load. A supply can reach the release threshold without having enough current capability to sustain switching, producing repeated enable and disable behavior.

Review the power stage consequences

Check whether the load, bootstrap network, or opposing switch can place the power stage in an unfavorable state during recovery. Verify gate control when output bias is absent and the switching node can still move. The selected driver’s unpowered output behavior must be evaluated with the actual gate network.

Save the supply sequence, input state table, waveforms, and restart policy. A successful UVLO test demonstrates that both loss and return of bias lead to defined system behavior. Merely observing that the gate goes low during one supply dip leaves the recovery transition and interaction between channels unproven.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist