Balancing Hold Droop and Acquisition Time in a Sample-and-Hold Circuit

A larger hold capacitor can reduce the voltage change caused by leakage during hold, but it also changes how the circuit acquires a new value. Review both intervals together. Selecting capacitance from the droop requirement alone can produce a circuit that never settles before the hold command arrives.

Define two separate deadlines

The LFx98x sample-and-hold data sheet includes hold-capacitor guidance and performance information relating to acquisition and droop. Its device-specific conditions are useful examples of why the capacitance value must be tied to the complete sampling sequence.

Specify the longest hold interval and the maximum permitted voltage change during that interval. Separately specify the shortest acquisition interval and the largest expected input step before acquisition. Include timing variation in the control signal and the downstream conversion schedule.

Estimate the leakage contribution

For a constant leakage current, voltage change is approximately current multiplied by hold time and divided by capacitance. As an illustrative calculation, 100 pA acting for 10 ms on 10 nF produces 100 microvolts of change. This is a calculation example, not a guaranteed device leakage value.

Include the selected device’s leakage conditions, capacitor behavior and board surface leakage. Determine how temperature affects the budget. Keep these sources distinct from a step at the sampling transition, which can have a different mechanism and require a different remedy.

Verify acquisition after a large step

Apply representative input transitions and measure the error remaining when the circuit enters hold. Check source impedance and the driving amplifier’s ability to supply the acquisition demand. Use the manufacturer’s guidance for stability and capacitor selection rather than increasing capacitance without limit.

Repeat for positive and negative steps across the required range. Observe the actual control timing and the point at which the downstream circuit reads the held output. A measurement made long after acquisition can conceal an initial settling error or combine it with later droop.

Preserve measurement access carefully

Use an observation method that does not add significant leakage or capacitance to the sensitive hold node. Prefer the documented buffered observation point where appropriate. Record probe and instrument loading whenever a direct measurement is necessary.

Keep separate plots for acquisition error, hold-transition error and hold-time drift. Attach temperature, input step, capacitance and timing conditions to each result. This makes the capacitor choice reviewable and reveals whether a proposed improvement addresses the dominant error. Recheck the budget when firmware lengthens hold time or shortens the interval available to acquire the next sample.