An emitter follower can reduce the load presented to a signal source, but it does not reproduce every input voltage exactly. Its bias, load current, and available collector voltage determine the usable output range. A no-load waveform is therefore a poor substitute for checking the buffer with the intended load connected.

Separate DC offset from incremental gain

The Analog Devices emitter-follower activity shows that the incremental voltage gain is below unity and depends on loading and transistor operating conditions. The DC base-emitter difference is a separate consideration from that small-signal gain.

Record the input bias, signal amplitude, collector supply, emitter load, and expected load-current direction. Do not model the stage as an ideal unity-gain amplifier followed by a fixed voltage subtraction.

Measure the source under load

Observe the base waveform while the actual emitter load is connected. A finite-impedance source must provide base current, so its output may change even though the transistor reduces the load compared with a direct connection.

Compare the source waveform before and after connecting the buffer. If the source itself clips or shifts bias, an emitter-only measurement can misidentify the origin of the distortion.

Sweep the complete signal range

Apply the largest intended signal at several representative loads. Measure base and emitter voltages together, including their DC levels. Look for unequal behavior on rising and falling portions of the waveform.

For a simple NPN follower with an emitter resistor, the transistor provides one current direction while the resistor provides the return path. A capacitive load can therefore expose different charging and discharging behavior. Check the actual topology rather than assuming symmetric drive.

Check headroom and temperature

Track collector-emitter voltage near the upper output excursion and transistor current across the cycle. Confirm that the required output remains within a suitable operating region.

Repeat after thermal settling and at relevant supply extremes. A changed base-emitter voltage can shift the DC output even when the small-signal shape remains acceptable. Include that shift in the downstream circuit’s input-range budget.

If a complementary buffer or feedback loop is added to improve performance, repeat the full test. The resulting circuit has different bias and stability requirements and should not inherit the single-transistor result without verification.

Save loaded transfer measurements, DC operating points, source loading, and peak current. The useful acceptance criterion is the error and distortion at the required load over the supported signal range. Describing the circuit as a voltage follower does not establish rail-to-rail swing, zero offset, or equal sourcing and sinking capability.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist