Checking Differential Probe CMRR at Switching Edges

A differential probe can display an apparent gate spike or current sense disturbance even when much of the observed voltage is common to both inputs. The probe must reject that common mode signal while preserving a much smaller differential signal. A single low frequency CMRR number does not describe every switching measurement.

Define both input voltages

Identify the differential voltage, the voltage of each input relative to the instrument reference, and the transition rate. Check all applicable operating and safety limits. Staying within the differential range alone does not establish that either input is within its common mode range.

The Tektronix technical brief on differential measurement error describes frequency dependent common mode rejection and the effect of mismatch in the measurement paths. Use the probe’s frequency dependent specifications when assessing a fast edge, rather than applying a DC rejection figure to the whole waveform.

Estimate the error scale

As a simplified sinusoidal example, 40 dB of rejection corresponds to a voltage ratio of 100. A 10 V common mode component could therefore produce a 100 mV equivalent differential contribution at that frequency. This is an illustrative error scale, not a prediction of the complete response to a switching step.

Compare the possible contribution with the feature being interpreted. If the claimed gate disturbance is similar in size, a second measurement method or a more suitable probe may be necessary before changing the gate network.

Control the connection geometry

Keep the two input connections consistent with the probe manufacturer’s recommended arrangement. Unequal leads, loops, adapters, or coupling to nearby switching copper can compromise the practical measurement. Photograph the attachment so a later test does not silently introduce a different measurement path.

Where permitted by the equipment instructions and circuit conditions, a controlled common mode check with the inputs connected together at the same node can help reveal residual response. This check requires the same attention to input limits as the intended measurement. It does not calibrate away all errors in a different connection.

Compare evidence before modifying the board

Repeat the measurement with improved symmetry, an appropriate bandwidth setting, or an independent measurement system. Record which changes alter the apparent spike and which leave it unchanged. Do not subtract a conveniently shaped artifact without demonstrating that its amplitude and timing remain valid.

Save probe model, attenuation, bandwidth, input attachment, common mode waveform, and the expected error scale. A defensible conclusion distinguishes a measured circuit disturbance from a feature that remains inside the uncertainty of common mode rejection.