Check Boundary Scan Chain Readiness Before Building the Fixture

A connector labelled JTAG does not establish that a board has a usable boundary scan test path. A processor may expose debugging functions while another device is held in reset, a level translator is disabled, or the intended boundary scan pins have another startup function. Check the complete chain before buying a fixture around it.

Identify what is actually in the chain

List the fitted device, package, silicon variant and chain position. Obtain the matching BSDL description from the device manufacturer. Do not select a file only because its filename resembles the family name. XJTAG’s design for test guidelines explain the role of BSDL information and the access needed to operate a chain. The file describes boundary scan behavior; it does not describe every functional behavior of the assembled board.

Draw the serial path from the test controller output through each device to the return input. Separately record clock, mode select, optional reset, power and ground. Mark any buffer, multiplexer, isolation device or connector between those points. Each intervening part adds a state that the test procedure must establish.

Make startup conditions explicit

Document which rails are powered during testing and what powers the test interface. Check signal compatibility against the actual device documentation. A powered adapter connected to an unpowered target may create a different electrical condition from the one used during development.

Record strap settings and reset sequences that make the chain available. If production software reconfigures the relevant pins, distinguish the blank-device test sequence from the programmed-device sequence. Include an accessible way to recover a board whose software prevents normal access.

Separate chain verification from fault coverage

First establish that the expected devices respond in the expected order. A reported identity mismatch is a reason to examine configuration, assembly and device descriptions before running an interconnect test. Do not suppress the mismatch simply to obtain a green station indicator.

Next inspect the proposed coverage report. Identify which connections can be driven and observed, which components require additional models, and which nets remain inaccessible. An analog signal or a connection behind an inactive switch may need a different test method. Passing the scan chain itself does not prove those circuits work.

Keep a reproducible bring-up record

Save the hardware revision, population variant, BSDL versions, adapter configuration, power sequence and first successful chain result. Repeat the check after a substitution affecting the chain. A practical release criterion is that a second engineer can reproduce chain identification from the documented setup without guessing a jumper position or borrowing an undocumented development script.