Reviewing a Shared Open-Drain Interrupt Line

Combining several active-low interrupt outputs on one wire can save processor pins, but the shared line needs both an electrical and a software review. Every connected source must be compatible with the common node, and the processor must be able to identify and clear the event without losing another source.

Confirm the output type and voltage domain

Texas Instruments’ open-drain pull-resistor guidance describes selecting resistance against output and receiver requirements. Apply those checks to the combined node. A pin described as an interrupt is not necessarily open drain; confirm the selected device’s output structure and configuration.

List every connected output, the receiver, pull-up rail, external resistors, and relevant leakage specifications. Check allowed voltage when each device is powered and unpowered. A shared signal that crosses power domains needs a defined behavior for partial-power states.

Review the combined electrical load

1. Calculate the effective resistance of all fitted pull-ups.
2. Check the low-level voltage and sink-current requirements.
3. Include combined leakage when checking the released high level.
4. Estimate and measure the rise behavior with the actual node capacitance.
5. Confirm that each source can assert the line independently.

For illustration, two 10-kilohm pull-ups to the same rail produce 5 kilohms. The stronger combined pull-up changes sink current and rise behavior. Document all module and fixture resistors rather than considering only the one shown beside the processor.

Define how events are cleared

Read each peripheral’s interrupt behavior: level or pulse, latched or transient, and the transaction that clears it. A processor configured for an edge may miss a new source while another device already holds the line low. The service routine should account for the actual source semantics rather than assuming one falling edge means one event.

Test simultaneous events, an event arriving during service, and a source that remains asserted. Observe the shared node while logging source status. Include a failed communication case so the system has a defined response when it cannot clear one peripheral.

Keep the electrical calculation and event-handling policy with the board and firmware revisions. If another device is added to the shared line, revisit loading, power-state compatibility, and service behavior together. The useful outcome is a line that reports and resolves all required events under realistic combinations, not merely one that goes low when each peripheral is tested alone.

Record which sources are present in each product variant so the test configuration matches the populated board.

Preserve a raw waveform for the simultaneous-event test so the timing can be reviewed independently of firmware logs.