Check Net-Label Scope Before Reusing a Hierarchical Schematic Sheet

Reusing a schematic sheet can accidentally connect channels that were meant to remain independent. The drawing may look correct because each block has the same local structure. The risk lies in the scope of its labels and power connections, especially when a circuit that once existed only once is instantiated several times.

The KiCad 10 schematic manual distinguishes local labels, global labels, and hierarchical connections through sheet pins. Use those semantics when designing a reusable block. A naming convention alone cannot change the electrical scope of the object carrying the name.

Classify the block’s nets

Make three lists: private internal nodes, intentionally shared resources, and exported interfaces. For a repeated sensor channel, an internal amplifier node may be private while a communications bus is shared. Power rails also need an explicit decision; copying a global power symbol can connect channels even if the signal labels are carefully scoped.

Document the interface at the parent sheet. A reviewer should be able to see how the block connects without opening every internal page. Avoid exporting an internal node merely because doing so makes a temporary debugging connection convenient.

Run a two-instance experiment

1. Place two instances of the block in a review copy of the project.
2. Connect their external interfaces to clearly distinguishable parent nets.
3. Inspect resolved connectivity for one private node in each instance.
4. Confirm that intended shared nets do connect across instances.
5. Check that each exported interface reaches the correct parent connection.

This is a practical positive and negative check. It proves both the connection you intended and the separation you intended. Looking only for unconnected pins can miss an accidental merge because an unwanted connection may satisfy the checker.

Review naming after integration

Repeat the check after copying, renaming, or flattening a hierarchy. Those changes can affect connectivity assumptions even when the component values remain identical. Keep the block’s intended interface description with its reusable source.

Before transferring the design to the board, run the relevant electrical checks and inspect a few distinctive nets through the hierarchy. Preserve the two-instance review result as evidence for the reusable block, while remembering that later integrations can still wire its interfaces incorrectly. See design release checks for the broader manufacturing handoff.