A PoE input bridge corrects cable power polarity, but its voltage drop and current paths also affect the power and thermal budget. The chosen rectifier arrangement must work across the supported pairsets and polarities. Testing one convenient input connection does not exercise every conducting path.

Map the supported inputs

The Analog Devices LT4321 data sheet describes polarity correction for PoE pairsets and contrasts diode bridge loss with an actively controlled MOSFET bridge. An active solution still requires the specified controller and transistor connections to perform that function correctly.

Draw the current path for each supported pairset and polarity. Identify which diodes or MOSFETs carry source and return current, and which devices remain blocking.

Calculate conduction loss

For a conventional bridge with two conducting diodes, use their forward voltage at the relevant current and temperature. A hypothetical 0.5 A through two diodes each dropping 0.6 V produces 0.6 W of bridge loss.

For a MOSFET based arrangement, calculate the relevant channel losses using on resistance under the actual gate drive and temperature conditions, then include controller consumption. Do not use a room temperature typical resistance as the complete thermal estimate.

Review detection and reverse paths

Evaluate the bridge together with the PD interface’s detection, classification, and startup behavior. Leakage or unintended current into an unpowered input can matter even when the full load conduction loss is acceptable.

Check the supported behavior when one pairset is powered and another is not. The bridge should be assessed as part of the complete input network, including protection and any alternate power connection.

Verify each relevant path

Use a controlled source arrangement or suitable PoE equipment to exercise the permitted input combinations. Measure voltage drop, current distribution where applicable, and component temperature after the relevant operating interval.

Inspect startup as well as steady load. An active bridge may pass current through a different path before its controller becomes fully operational. Compare that transient with device limits and the PD startup sequence.

Save the polarity map, component identities, loss calculation, measured temperatures, and input combinations tested. Recheck the result after changing diode technology or MOSFETs because electrical compatibility and thermal behavior can change together. A satisfactory bridge review demonstrates correct polarity handling and acceptable losses across the intended configurations; selecting a component labeled ideal diode does not make the complete input path lossless or automatically compatible with every powered device interface. Label the energized pairsets in every thermal measurement record.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist