A PLL can report lock while showing unwanted spurs around its output carrier. For an integer-N design, leakage associated with the loop-filter path is one possible contributor. Investigate it within a defined model rather than treating every reference-related spur as a routing problem.

Identify the spur pattern

Analog Devices’ AN143 discussion explains how charge-pump leakage and active-filter amplifier currents can contribute to reference spurs in an integer-N PLL. Its model has a stated scope; fractional-N mechanisms should not be assumed equivalent.

Record carrier frequency, phase-frequency-detector frequency, divider settings, loop configuration and the offset of each observed spur. Verify analyzer headroom and measurement settings before assigning the pattern to the PLL. Preserve the complete configuration that produced the trace.

Map the tune-node connections

List the charge pump, filter capacitors, active amplifier if present, VCO tuning input, test points and any connected instruments. Identify specified leakage or bias currents and their operating conditions. A measurement probe can become another load on a sensitive control node.

Check the operating tune voltage and temperature range used in the product. Do not build a leakage budget only from room-temperature typical values if the relevant specifications change with condition. Mark unavailable data rather than silently assigning zero current to an undocumented path.

Test one hypothesis at a time

Compare observed behavior with the manufacturer’s model using the actual loop parameters. Use controlled changes that preserve a meaningful comparison, and record which assumptions each experiment tests. Changing loop bandwidth, charge-pump current and layout simultaneously makes the result difficult to attribute.

If an instrument connection changes the spur, investigate its loading before declaring the unprobed circuit improved or defective. Retain measurements taken through a suitable observation path and document any compensation or model needed to interpret them.

Keep other PLL requirements in the review

A change that lowers one spur may alter phase noise, lock time or stability. Evaluate those requirements alongside the spur result. A lock-detect indication alone does not establish spectral performance or adequate dynamic behavior.

Close the investigation with the supported cause, remaining alternatives, selected configuration and measured tradeoffs. If leakage remains a hypothesis, state that clearly and identify the evidence still needed. The objective is a traceable explanation of the spectral result under defined conditions, not a general assertion that every spur near the reference spacing comes from one capacitor, amplifier or board-contamination mechanism. Preserve the unmodified loop-filter values and board photographs so that another engineer can reproduce the baseline before assessing the proposed correction.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist