Checking MCU Input Injection When Another ADC Channel Moves

A sensor input driven beyond an MCU’s allowed voltage can disturb more than that one channel. Current through input structures may affect nearby analog circuitry or supply domains. A series resistor can reduce current, but it does not by itself establish that operation is permitted or that other ADC readings retain their specified accuracy.

Identify the exact pin structure

ST’s AN4899 GPIO guidance distinguishes pin types and injection constraints. Use the selected MCU’s data sheet for the particular pin, mode, supply state, and permitted current. A pin advertised as voltage tolerant in one digital configuration may have different restrictions in analog mode.

Imagine a board with a powered external sensor and an MCU whose analog rail is still rising. A divider that is harmless at normal supply may drive the ADC pin above the valid range during startup. The resulting current can alter the rail or neighboring measurement. Checking only the steady-state divider ratio misses this sequence.

Map normal and fault current paths

Calculate the maximum pin voltage with component tolerances, disconnected grounds, and allowed supply ordering. Follow every possible clamp current to its destination. A regulator that sources current may not sink injected current, so a rail can rise even when the series resistor limits current to a small value. Check aggregate injection constraints as well as per-pin limits.

• Measure the suspect pin and relevant supply at startup and shutdown.
• Hold a second ADC channel at a stable known voltage.
• Vary the suspect input only within an approved bench-test envelope.
• Observe whether the second channel error follows pin current, supply movement, or sampling order.
• Repeat with a valid input voltage to distinguish ordinary multiplexer settling.

Protect accuracy as well as survival

External clamps, level translation, sequencing, or signal disconnection may be needed. Their leakage and capacitance must be included in the sensor error budget. A current below an absolute maximum is not automatically a condition under which ADC accuracy is guaranteed. Preserve the manufacturer’s operational restrictions in the schematic notes.

Use back-power path analysis to assess supply sequencing and multiplexer settling tests for history-dependent channel errors within the normal input range. The completed review should identify the valid measurement envelope and the separate fault envelope, including what firmware must discard during recovery.