An LDO selected for a large PSRR number may provide much less rejection at the switching frequency and headroom used on the PCB. The useful question is how much of the actual input disturbance reaches the load under the intended operating conditions. Treat PSRR as a frequency dependent relationship, not a single product attribute.

Define the disturbance entering the LDO

Measure or estimate the ripple spectrum at the regulator input, including relevant harmonics and load related modulation. Record DC input and output voltages, load current, and capacitor configuration. These conditions are needed to interpret the corresponding data sheet curves.

The TI seminar on advanced linear regulator applications discusses PSRR dependence on frequency, load, and headroom. Use the curve that most closely represents the application and identify where the available data does not cover the required condition.

Translate rejection into an output estimate

For a voltage rejection ratio expressed as 20 times the base ten logarithm of input ripple divided by output ripple, 40 dB corresponds to a factor of 100. A hypothetical 20 mV ripple component would then contribute 0.2 mV at the output if that rejection applies at its frequency and operating point.

This estimate does not include the regulator’s own noise, other coupled interference, or unrelated load transients. Calculate and measure those contributions separately. A low intrinsic noise specification does not establish strong rejection of external ripple.

Review minimum headroom

Calculate the minimum instantaneous input output difference, including source tolerance, wiring drop, and ripple valleys. A nominal DC difference can conceal operation close to dropout during part of the cycle. Check the required performance at the highest relevant load and temperature.

Do not assume that increasing input voltage is an unrestricted remedy. It also changes dissipation and may alter temperature, which can affect other performance. Balance rejection and thermal requirements using the actual device data.

Measure a meaningful ratio

When injecting ripple for a bench test, verify the applied signal at the LDO input and the resulting output component. Use adequate instrument dynamic range and avoid common grounding paths that bypass the regulator. Confirm that the injected signal is small enough to stay within the intended operating regime.

Repeat at the frequencies and loads that drive the design decision. Save capacitor parts, DC conditions, injection amplitude, bandwidth, and measurement connections. A useful result states the achieved rejection for a defined condition and the remaining output disturbance, rather than claiming that one PSRR figure describes the whole application.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist