KiCad can report that a power-input pin is not driven even when a connector is intended to supply the board. The warning concerns the schematic’s electrical model. Resolve it by checking the source and pin types, not by placing flags on every rail until the report becomes quiet.
Understand what the flag tells ERC
KiCad’s schematic documentation explains that PWR_FLAG presents a power-output pin to the electrical-rule checker. It is useful when a real supply enters through passive connector pins or another path that ERC does not recognize as a power source. The symbol does not generate power or verify the external connection. KiCad: power pins, flags, and ERC.
Start at the flagged net and trace it to the intended supply. Check connector pin numbering, labels, hierarchical connections, and any series element. Confirm that the regulator or source symbol has appropriate pin types. A missing wire or incorrect label should be fixed rather than hidden with a flag.
Review each electrical net separately
- Identify where external power enters the design.
- Check whether passive filters or protection parts create a downstream net.
- Confirm the intended ground connection as well as the positive rail.
- Look for accidental connections between independent supply outputs.
- Use a flag only where it accurately describes the circuit’s source relationship.
For example, a connector feeding a rail through a passive filter may leave the downstream net without a power-output pin in ERC’s model. Once the wiring and intended supply path are confirmed, an appropriate flag can describe that condition. It should not be used to excuse a connector pin that is unconnected in the actual circuit.
Avoid changing pin types for convenience
Making every pin passive can suppress useful conflict checks. Similarly, changing a power-input pin to power-output merely to remove a warning misrepresents the component. Correct library errors through a reviewed symbol change and keep the datasheet as the authority for the component’s function.
Rerun and review the complete report
After the correction, rerun ERC and inspect remaining warnings and exclusions. Keep any intentional exception local and documented. Check that the change did not connect rails through an unintended global label or hidden power pin.
A clean ERC report does not establish voltage compatibility, power sequencing, current capability, or the correctness of an external harness. Those remain design checks. The flag’s purpose is narrower: it lets the automated checker understand a real source connection that the symbol pin types would otherwise leave ambiguous.
Move from reading to a build-ready project
Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.
Open the DFM checklist