Changing a dielectric thickness in the layer stack does not by itself prove that all controlled-impedance routes now use appropriate geometry. The profile, its rule assignment, and the existing copper may need separate review. Follow the dependency chain from stackup assumptions to the released fabrication files.

Altium’s controlled-impedance routing documentation describes profiles linked to routing requirements and layer-dependent geometry. Verify the behavior of the actual project and software version, particularly whether existing routes require manual adjustment after profile changes.

Confirm the revised physical model

Record the stackup revision agreed with the fabricator and the material assumptions used in the calculation. Check layer order, copper and dielectric thicknesses, reference conductors, and the profile’s supported routing layers. Do not mix values from different proposed stackups. Record any calculation setting that materially affects the result and retain the original supplier correspondence, so a future reviewer can distinguish confirmed construction values from preliminary design estimates.

Keep the engineering target separate from a nominal geometry recommendation. The fabricator’s manufacturing interpretation and verification plan should be resolved through the fabrication specification. An EDA calculation alone is not evidence that a finished board meets the target.

Trace the profile into actual use

Dependency Check after the change
Profile inputs They describe the intended revised construction
Layer-specific geometry Widths and gaps are reviewed for each permitted layer
Rule association The correct nets or pairs use the correct profile
Placed copper Existing tracks and transitions satisfy the reviewed requirement

Inspect a representative route on every affected layer, including any neck-down or local exception. A new interactive route using the expected width does not demonstrate that old copper elsewhere was updated.

Review the consequences of geometry changes

  1. Identify all nets and pairs using the changed profile.
  2. Compare the previous and revised layer-specific requirements.
  3. Update routing through the approved design process.
  4. Recheck clearances, pair relationships, and transitions.
  5. Regenerate the stackup and impedance documentation.

Consider the physical consequences of wider tracks or changed pair gaps in dense breakout regions. If geometry cannot be implemented, resolve the exception with the responsible signal-integrity and fabrication reviewers rather than leaving the profile name unchanged while using incompatible copper.

Close the review with one coherent release: PCB data, stackup, impedance table, and relevant verification requirements. Remove superseded assumptions from the supplier handoff so they cannot be selected accidentally. The rule-scope guide helps verify the link between the profile and the objects it is meant to control.

Move from reading to a build-ready project

Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.

Open the DFM checklist