A schematic can contain an electrical connection that is not apparent from its wires. Legacy or custom symbols may include hidden power input pins. KiCad’s hidden-pin library convention identifies the risk of unexpected connections, and the KiCad 10 manual explains that invisible power input pins can connect globally by pin name.
Investigate this when supposedly separate rails appear connected, an imported symbol behaves differently from its drawing, or an ERC result seems inconsistent with visible wiring. Adding a power flag is not a remedy for an incorrect implicit net connection.
Expose the symbol’s electrical properties
Enable hidden-pin display and inspect the actual symbol instance used by the project. List pin number, name, electrical type, visibility, and unit. Compare that list with the exact component’s pin table. A hidden graphical item and a hidden electrically active pin are different things.
Pay special attention to generic names such as VCC, VDD, and GND. In a design with several voltage domains, a familiar name can conceal the wrong connection. Also inspect imported pin stacks: making extra stacked pins invisible can have unintended consequences if their electrical types were chosen incorrectly.
Trace the resolved nets
- Select an affected pin and identify its resolved net.
- Find every other connection on that net across the project.
- Compare the result with the intended power-domain diagram.
- Locate the symbol property or label that creates each unexpected connection.
- Record the mismatch before modifying the library object.
Work from actual net membership, not only displayed text. Two labels that look similar may resolve differently, while an invisible pin may create a connection far from the visible circuit. Include any repeated sheet instances in the investigation.
Correct the intent, then rerun checks
Where appropriate, make the device’s power connection visible and wire it explicitly to the intended rail. Review the change against the manufacturer’s requirements and the project’s symbol conventions. Do not change electrical types merely to silence a warning; those types help the checker evaluate the circuit.
After updating the schematic, compare connectivity before and after the correction. Check other instances of the same symbol, then update the board and inspect the affected pads and planes. A clean schematic report does not prove that an already routed board has received the correction.
Close the issue with a short record naming the affected pins, previous nets, intended nets, and revised library item. This makes future reviews possible without rediscovering the hidden behavior. The power-input ERC guide addresses the separate case where the rail is correct but its source is not represented to the checker.
Move from reading to a build-ready project
Use the fabrication and assembly checklists to prepare drawings, production files and test requirements.
Open the DFM checklist