Verify Differential-Pair Membership After Schematic-to-PCB Transfer

Two nets named with positive and negative suffixes are not sufficient evidence that a PCB editor has created the intended differential pair. Transfer settings, hierarchy, or the selected constraint workflow can change what reaches the board. Inspect the pair objects before routing or accepting a constraint report.

Altium’s schematic differential-pair documentation distinguishes directive-based definitions from the Constraint Manager workflow. Confirm which approach the project uses. A visible schematic directive may not be the authoritative definition in every project configuration.

Start from the physical signal path

List the intended transmitter and receiver pins for each pair. Include connector pins and any series components that split the path into separate net names. Decide which electrical segments are represented by each pair object and which relationships require additional constraints.

Check polarity against the device and connector documentation. A naming convention describes intent but does not correct an incorrectly assigned symbol pin or cable mapping. Keep any permitted polarity inversion explicit and supported by the interface implementation.

Inspect the transferred objects

Compare the expected number of pairs with the generated set, but do not stop at counts. Two omitted pairs and two unintended pairs can produce a reassuring total. Review membership using pin endpoints and representative highlighting on the board.

Test changes that can break the relationship

1. Rename a net or channel only through a controlled design edit.
2. Review the proposed synchronization changes.
3. Confirm the resulting pair membership.
4. Check that old or duplicate pair definitions are not left behind.
5. Run the relevant constraint checks again.

For repeated channels, inspect more than the first instance. Similar names can conceal a cross-channel pairing, especially when hierarchical naming changes during compilation. Preserve a compact expected-pair list with the design review, including the channel identity and endpoints used to establish each relationship.

A correctly defined pair is only the beginning of signal-integrity work. Geometry, return paths, discontinuities, and interface timing still need their own review. Do not infer electrical performance from successful pair recognition.

Close the audit with the pair list and constraint association used by the released PCB. The rule-scope guide explains how to verify that a requirement includes the intended objects and excludes unrelated nets.