Evaluate DAC Glitch Impulse Against the Downstream Observation Window

A DAC output can reach an accurate final voltage while producing an unwanted transient during the code change. Whether that transient matters depends on what the following circuit observes. Review the transition itself, the recovery and the downstream timing rather than relying only on static accuracy.

Choose transitions that expose the question

Analog Devices’ DAC glitch measurement article discusses code-transition disturbances, including major-carry transitions, and evaluates the voltage-time area of the glitch. That quantity is different from peak amplitude and from the time needed to settle within a chosen error band.

List the code changes used by the application, including small adjacent changes near major carries and large output steps. Retain the DAC architecture, output configuration and load in the test record. A single full-scale step does not necessarily expose the transition that is most troublesome for the system.

Define what is being measured

Specify whether the concern is peak excursion, impulse area, settling error or disturbance of a following control loop. Identify the measurement node and its reference. Record the update command and any separate latch event so that the waveform is aligned with the actual analog update.

If an area is reported in volt-seconds, keep the integration window and baseline definition. Do not interpret that quantity directly as energy in joules without a relevant circuit model. Two waveforms with similar area can have different peak values and affect a downstream circuit differently.

Measure the installed output network

Capture the DAC pin and the system observation point when practical. The output amplifier, filter and load can change the pulse seen by the rest of the board. Document probe capacitance and bandwidth because a narrow transient is particularly sensitive to the measurement setup.

Repeat the same transitions with the actual update rate and load states. Check whether successive events interact before the network has recovered. An isolated transition measured at a low repetition rate may conceal accumulation or repeated disturbance in the intended operating sequence.

Evaluate filtering with its delay

A filter or held observation interval may reduce the observed glitch, but it can also alter settling and bandwidth. Compare candidate changes using the same observation time and allowed error. If firmware delays a measurement, make that delay a controlled requirement rather than an undocumented bench workaround.

Keep the transition list, captured waveforms, measurement definitions and accepted limits with the design. The result should explain when the output is usable and what disturbance is allowed before then. This provides stronger evidence than describing a DAC as glitch-free merely because its final voltage is correct on a multimeter.